JEDEC JESD 12-1B PDF

Name:
JEDEC JESD 12-1B PDF

Published Date:
08/01/1993

Status:
Active

Description:

ADDENDUM No. 1 to JESD12 - TERMS AND DEFINITIONS FOR GATE ARRAYS AND CELL-BASED INTEGRATED CIRCUITS

Publisher:
JEDEC Solid State Technology Association

Document status:

Active

Format:

Electronic (PDF)

Delivery time:

10 minutes

Delivery time (for Russian version):

200 business days

SKU:

The purpose of this standard is to promote the uniform use of abbreviations, terms, and definitions throughout the semiconductor industry. It is a useful guide for users, manufactures, educators, technical writers, and others interested in the characterization, nomenclature, and classification of semicustom integrated circuits.

File Size :	1 file
Note :	This product is unavailable in Ukraine, Russia, Belarus
Number of Pages :	19
Published :	08/01/1993

History

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