JEDEC JESD 12-2 PDF

JEDEC JESD 12-2 PDF

Name:
JEDEC JESD 12-2 PDF

Published Date:
02/01/1986

Status:
Active

Description:

ADDENDUM No. 2 to JESD12 - STANDARD FOR CELL-BASED INTEGRATED CIRCUIT BENCHMARK SET

Publisher:
JEDEC Solid State Technology Association

Document status:
Active

Format:
Electronic (PDF)

Delivery time:
10 minutes

Delivery time (for Russian version):
200 business days

SKU:

Choose Document Language:
$23.4
Need Help?
The purpose of these benchmarks is to provide a common set of high level functions that serve as vehicles for comparing the performance of cell-based ICs implemented in any technology using any internal structure. JESD12-2 extends the gate array benchmark set (JESD12) to cell-based ICs.
File Size : 1 file
Note : This product is unavailable in Ukraine, Russia, Belarus
Number of Pages : 38
Published : 02/01/1986

History


Related products

JEDEC JEP116
Published Date: 11/01/1991
CMOS SEMICUSTOM DESIGN GUIDELINES
$42.3
JEDEC JESD15-3
Published Date: 07/01/2008
TWO-RESISTOR COMPACT THERMAL MODEL GUIDELINE
$18.6
JEDEC JESD12
Published Date: 06/01/1985
SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET)
$16.2
JEDEC JESD22-B114B
Published Date: 01/01/2020
Mark Legibility
$16.8

Best-Selling Products