Name:
JEDEC JESD238A PDF
Published Date:
01/01/2023
Status:
Active
Publisher:
JEDEC Solid State Technology Association
The HBM3 DRAM is tightly coupled to the host compute die with a distributed interface. The interface is divided into independent channels. Each channel is completely independent of one another. Channels are not necessarily synchronous to each other. The HBM3 DRAM uses a wide-interface architecture to achieve high-speed, low power operation. Each channel interface maintains a 64 bit data bus operating at double data rate (DDR).
| File Size : | 1 file , 7.7 MB |
| Note : | This product is unavailable in Ukraine, Russia, Belarus |
| Number of Pages : | 270 |
| Published : | 01/01/2023 |
