JEDEC JESD239.01 PDF

JEDEC JESD239.01 PDF

Name:
JEDEC JESD239.01 PDF

Published Date:
04/01/2024

Status:
Active

Description:

Graphics Double Data Rate 7 SGRAM Standard (GDDR7)

Publisher:
JEDEC Solid State Technology Association

Document status:
Active

Format:
Electronic (PDF)

Delivery time:
10 minutes

Delivery time (for Russian version):
200 business days

SKU:

Choose Document Language:
$Free Download
Need Help?

This standard defines the Graphics Double Data Rate 7 (GDDR7) Synchronous Graphics Random Access Memory (SGRAM) specification, including features, functionality, package, and pin assignments.

The purpose of this standard is to define the minimum set of requirements for 16 Gb through 64 Gb x8 quad channel GDDR7 SGRAM devices. System designs based on the required aspects of this standard will be supported by all GDDR7 SGRAM vendors providing compatible devices. Some aspects of the GDDR7 standard such as AC timings and capacitance values were not standardized. Some features are optional and therefore may vary among vendors. In all cases, vendor data sheets should be consulted for specifics. This document was created based on some aspects of the GDDR6 Standard (JESD250) and other JEDEC device standards.


File Size : 1 file , 5.4 MB
Note : This product is unavailable in Russia, Belarus
Number of Pages : 322
Published : 04/01/2024

History

JEDEC JESD239A
Published Date: 09/01/2024
Graphics Double Data Rate 7 SGRAM Standard (GDDR7)
Free Download
JEDEC JESD239.01
Published Date: 04/01/2024
Graphics Double Data Rate 7 SGRAM Standard (GDDR7)
Free Download
JEDEC JESD239
Published Date: 02/01/2024
Graphics Double Data Rate 7 SGRAM Standard (GDDR7)
Free Download

Related products

JEDEC JESD89A
Published Date: 10/01/2006
MEASUREMENT AND REPORTING OF ALPHA PARTICLE AND TERRESTRIAL COSMIC RAY INDUCED SOFT ERRORS IN SEMICONDUCTOR DEVICES
$42.3
JEDEC JESD671C
Published Date: 07/01/2018
Component Quality Problem Analysis and Corrective Action Requirements (Including Administrative Quality Problems)
$18.6
JEDEC JESD82-3B.01
Published Date: 01/01/2023
DEFINITION OF THE SSTV16857 2.5 V, 14-BIT SSTL_2 REGISTERED BUFFER FOR DDR DIMM APPLICATIONS
Free Download
JEDEC JESD32
Published Date: 06/01/1996
STANDARD FOR CHAIN DESCRIPTION FILE
$17.7

Best-Selling Products