Name:
JEDEC JESD82-12A.01 PDF
Published Date:
01/01/2023
Status:
Active
Publisher:
JEDEC Solid State Technology Association
This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTU32S869 and SSTU32D869 registered buffer with parity for driving heavy load on high-density DDR2 RDIMM applications. A typical application would be a 36 SDRAM planar DIMM.
The purpose is to provide a standard for the SSTU32S869 and SSTU32D869 (see Note) logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
NOTE The designations SSTU32S869 and SSTU32D869 refers to the part designation of a series of commercial logic parts common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.
| File Size : | 1 file , 960 KB |
| Note : | This product is unavailable in Ukraine, Russia, Belarus |
| Number of Pages : | 32 |
| Published : | 01/01/2023 |