JEDEC JESD82-6A PDF

JEDEC JESD82-6A PDF

Name:
JEDEC JESD82-6A PDF

Published Date:
11/01/2004

Status:
Active

Description:

DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS

Publisher:
JEDEC Solid State Technology Association

Document status:
Active

Format:
Electronic (PDF)

Delivery time:
10 minutes

Delivery time (for Czech version):
200 business days

SKU:
jedec-jesd82-6a_1775453

Choose Document Language:
17.70 €
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This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTV32852 24-bit to 48-bit SSTL_2 registered buffer for stacked DDR DIMM applications. The purpose is to provide a standard for the SSTV32852 logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
File Size : 1 file , 180 KB
Note : This product is unavailable in Ukraine, Russia, Belarus
Number of Pages : 17
Published : 11/01/2004

History

JEDEC JESD82-6A.01
Published Date:
DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS
JEDEC JESD82-6A
Published Date: 11/01/2004
DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS
17.70 €

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