The electric and mechanical issues attendant with IC packaging are inextricably linked. Lessons learned in the electronics industry's transition from through hole technology (THT) to surface mount technology (SMT) are being relearned as the industry moves now from peripherally leaded components to area array packaging both in ball grid array (BGA) and chip scale package (CSP) formats. A high order concern, is the reliability of these new package concepts. Absent the long flexible leads found on earlier packages, new methods are required to make reliable solder interconnections between the die package and the substrate. This paper specifically addresses and describes strategies for creating compliant area array packages in both BGA and CSP formats. Examples of constructions will be provided which graphically describe compliant area array packages for electronic devices from 2 to 2000 plus
| Number of Pages : | 7 |
| Published : | 11/01/2000 |
