Design Technology Co-Optimization in the Era of Sub-Resolution IC Scaling PDF

Design Technology Co-Optimization in the Era of Sub-Resolution IC Scaling PDF

Name:
Design Technology Co-Optimization in the Era of Sub-Resolution IC Scaling PDF

Published Date:
01/01/2016

Status:
[ Active ]

Description:

Publisher:
International Society for Optics and Photonics

Document status:
Active

Format:
Electronic (PDF)

Delivery time:
10 minutes

Delivery time (for Czech version):
200 business days

SKU:
design-technology-co-optimization-in-the-era-of-sub-resolution-ic-scaling_2819583

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17.70 €
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TT104 * ISBN: 9781628416695

The challenges facing the most-advanced technology nodes in the microelectronics industry can be overcome with the help of design technology co-optimization (DTCO). This mediation process aims to ensure competitive technology architecture definition while avoiding schedule or yield risks caused by unrealistically aggressive process assumptions. This Tutorial Text reviews the fundamental design objectives as well as the resulting topological constraints of a standard cell logic design flow. Cell design, placement, and routing are examined against the backdrop of ever-increasing design constraints in advanced-technology nodes.

Author: Vaidyanathan, Kaushik


Edition : 16
Number of Pages : 179
Published : 01/01/2016
isbn : 4 * isbn 97816

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