DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V APPLICATIONS
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STANDARD FOR DESCRIPTION OF A 3.3 V, 18-BIT, LVTTL I/O REGISTER FOR PC133 REGISTERED DIMM APPLICATIONS
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LRDIMM DDR3 MEMORY BUFFER (MB) Version 1.0
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DDR4 Registering Clock Driver Definition (DDR4RCD02)
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DEFINITION OF THE SSTV16857 2.5 V, 14-BIT SSTL_2 REGISTERED BUFFER FOR DDR DIMM APPLICATIONS
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DEFINITION OF THE SSTV16857 2.5 V, 14-BIT SSTL_2 REGISTERED BUFFER FOR DDR DIMM APPLICATIONS
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STANDARD FOR DEFINITION OF THE SSTV16859 2.5 V, 13-BIT TO 26-BIT SSTL_2 REGISTERED BUFFER FOR STACKED DDR DIMM APPLICATIONS
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DDR5 Registering Clock Driver Definition (DDR5RCD02)
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DDR5 Registering Clock Driver Definition (DDR5RCD04)
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