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IEC 61691-6 Ed. 1.0 en:2009 PDF

IEC 61691-6 Ed. 1.0 en:2009 PDF

Name:
IEC 61691-6 Ed. 1.0 en:2009 PDF

Published Date:
12/14/2009

Status:
[ Withdrawn ]

Description:

Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions

Publisher:
International Electrotechnical Commission

Document status:
Active
Format:
Electronic (PDF)
Delivery time:
10 minutes
Delivery time (for Russian version):
200 business days
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Choose Document Language:
$132.9
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IEC 61691-6:2009(E) Defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDLAMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.
Edition : 1.0
File Size : 1 file , 4.8 MB
Note : This product is unavailable in Ukraine, Russia, Belarus
Number of Pages : 332
Published : 12/14/2009

History

IEC 61691-6 Ed. 2.0 en:2021
IEC 61691-6 Ed. 2.0 en:2021
Published Date: 06/08/2021
Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions
$153.6
IEC 61691-6 Ed. 1.0 en:2009
IEC 61691-6 Ed. 1.0 en:2009
Published Date: 12/14/2009
Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions
$132.9

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