JEDEC JESD 12-6 PDF

This standard defines logic interface levels for CMOS, TTL, ECL, and BiCC inputs and outputs. This standard is intended to provide an industry-wide set of specifications, for Application Specific Integrated Circuit (ASIC) signal inputs and outputs, both necessary and sufficient to define a circuits electrical interfacing with the external environment. JESD12-6 is intended to provide the ASIC manufacturer and user with a common set of signal interface levels. The standard defines interface levels for 5 volt operation.

File Size :	1 file , 510 KB
Note :	This product is unavailable in Ukraine, Russia, Belarus
Number of Pages :	13
Published :	03/01/1991