JEDEC JESD 82-25.01 PDF

JEDEC JESD 82-25.01 PDF

Name:
JEDEC JESD 82-25.01 PDF

Published Date:
12/30/2022

Status:
Active

Description:

DEFINITION OF the SSTUB32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS

Publisher:
JEDEC Solid State Technology Association

Document status:
Active

Format:
Electronic (PDF)

Delivery time:
10 minutes

Delivery time (for Russian version):
200 business days

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This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUB32866 registered buffer with parity test for DDR2 RDIMM applications.

The purpose is to provide a standard for the SSTUB32866 (see Note) logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

NOTE The designation SSTUB32866 refers to the part designation of a series of commercial logic parts common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.


File Size : 1 file , 1.3 MB
Note : This product is unavailable in Ukraine, Russia, Belarus
Number of Pages : 46
Published : 12/30/2022

History

JEDEC JESD 82-25.01
Published Date: 12/30/2022
DEFINITION OF the SSTUB32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
Free Download
JEDEC JESD 82-25
Published Date: 05/01/2007
DEFINITION OF the SSTUB32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
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