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JEDEC JESD28-A PDF

JEDEC JESD28-A PDF

Name:
JEDEC JESD28-A PDF

Published Date:
12/01/2001

Status:
Active

Description:

A PROCEDURE FOR MEASURING N-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION UNDER DC STRESS

Publisher:
JEDEC Solid State Technology Association

Document status:
Active
Format:
Electronic (PDF)
Delivery time:
10 minutes
Delivery time (for Czech version):
200 business days
SKU:
jedec-jesd28-a_1762631
Choose Document Language:
17.70 €
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This document describes an accelerated test for measuring the hot-carrier-induced degradation of a single n-channel MOSFET using dc bias. The purpose of this document is to specify a minimum set of measurements so that valid comparisons can be made between different technologies, IC processes, and process variations in a simple, consistent and controlled way. The measurements specified should be viewed as a starting point in the characterization and benchmarking of the transistor manufacturing process.
File Size : 1 file , 60 KB
Note : This product is unavailable in Ukraine, Russia, Belarus
Number of Pages : 18
Published : 12/01/2001

History

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