Name:
JEDEC JESD403-1C.01 PDF
Published Date:
08/01/2024
Status:
Active
Publisher:
JEDEC Solid State Technology Association
This standard defines the assumptions for the system management bus for next generation memory solutions; covering the interface protocol, use of hub devices, and voltages appropriate to these usages.
| File Size : | 1 file , 1.6 MB |
| Note : | This product is unavailable in Russia, Belarus |
| Published : | 08/01/2024 |
