DEFINITION OF THE SSTU32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS

Publisher:
JEDEC Solid State Technology Association

Document status:

Active

Format:

Electronic (PDF)

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10 minutes

Delivery time (for Russian version):

200 business days

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This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTU32866 registered buffer with parity test for DDR2 RDIMM applications. The purpose is to provide a standard for the SSTU32866 (see Note) logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

File Size :	1 file , 440 KB
Note :	This product is unavailable in Ukraine, Russia, Belarus
Number of Pages :	43
Published :	05/01/2007

JEDEC JESD82-10A PDF

DEFINITION OF THE SSTU32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS

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