JEDEC JESD317A PDF

This standard defines the specifications of interface parameters, signaling protocols, environmental requirements, packaging, and other features as reference for specific target implementations of CXL-attached memory modules.

The purpose is to provide certain reference base targets for CXL-attached memory modules to enable system design simplification, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

Further module design detail may be later found in annexes that comply with this base specification and as associated with the specific base reference modules defined herein.

Unless otherwise noted in the document, device operation is not guaranteed.