Publisher : JEDEC

BALL GRID ARRAY PINOUTS STANDARDIZED FOR 32-BIT LOGIC FUNCTIONS

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STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (WIDE RANGE OPERATION)

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STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (NORMAL RANGE OPERATION)

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STANDARD DESCRIPTION OF 1.5 V CMOS LOGIC DEVICES

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DESCRIPTION OF 1.8 V CMOS LOGIC DEVICES

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Terms, Definitions, and Letter Symbols for Discrete Semiconductor and Optoelectronic Devices

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IC LATCH-UP TEST

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IC LATCH-UP TEST

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IC LATCH-UP TEST

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IC LATCH-UP TEST

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