JEDEC JEP156A PDF

JEDEC JEP156A PDF

Name:
JEDEC JEP156A PDF

Published Date:
03/01/2018

Status:
Active

Description:

CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION

Publisher:
JEDEC Solid State Technology Association

Document status:

Active

Format:

Electronic (PDF)

Delivery time:

10 minutes

Delivery time (for Czech version):

200 business days

SKU:

jedec-jep156a_2008538

This publication references a set of frequently recommended and accepted JEDEC reliability stress tests. These tests are used for qualifying new and modified technology/ process/ product families, as well as individual solid state surface-mount products.

File Size :	1 file , 85 KB
Note :	This product is unavailable in Ukraine, Russia, Belarus
Number of Pages :	24
Published :	03/01/2018

History

Published Date: 03/01/2018

CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION

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Published Date: 03/01/2009

CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION

20.10 €

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