JEDEC JESD51-4 PDF

Name:
JEDEC JESD51-4 PDF

Published Date:
02/01/1997

Status:
Active

Description:

THERMAL TEST CHIP GUIDELINE (WIRE BOND TYPE CHIP)

Publisher:
JEDEC Solid State Technology Association

Document status:

Active

Format:

Electronic (PDF)

Delivery time:

10 minutes

Delivery time (for Russian version):

200 business days

SKU:

This guideline describes design requirements for wire bond type semiconductor chips to be used for thermal resistance listing of IC packages. This document provides specific guidelines for chip design but allows flexibility in the materials and layout requirements.

File Size :	1 file , 310 KB
Note :	This product is unavailable in Ukraine, Russia, Belarus
Number of Pages :	15
Published :	02/01/1997

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